lvd wrote:Глюг в перфекте
Так я не понял глюк в той версии которую вкорячил или это у алки?
TS-Labs wrote:Иногда необходимо засунуть в панельку старые ТЛЗ процы.
DimkaM wrote:В какую из панелек, под АУ которая или под ВГ, я должен засовывать проц?
http://www.nedopc.com/zxevo/zxevo_sm_mnt_c.jpg
TS-Labs wrote:фикс IFF и отличие в OUT (c), (HL)
OUT (C), r
Operation: (C) ←r
Op Code: OUT
Operands: (C), r
Description: The contents of register C are placed on the bottom half (A0 through A7) of
the address bus to select the I/O device at one of 256 possible ports. The
contents of Register B are placed on the top half (A8 through A15) of the
address bus at this time. Then the byte contained in register r is placed on
the data bus and written to the selected peripheral device. Register r
identifies any of the CPU registers shown in the following table, which also
shows the corresponding three-bit r field for each that appears in the
assembled object code:
Register r
B 000
C 001
D 010
E 011
H 100
L 101
A 111
M Cycles T States 4 MHz E.T.
3 12 (4, 4, 4) 3.00
Condition Bits Affected: None
Table 2. Interrupt Enable/Disable, Flip-Flops
Action IFF1 IFF2 Comments
CPU Reset 0 0 Maskable Interrupt, INTDisabled
DI Instruction Execution 0 0 Maskable INTDisabled
EI Instruction Execution 1 1 Maskable, INTEnabled
LD A,I Instruction Execution * * IFF2 → Parity Flag
LD A,R instruction Execution * * IFF2 → Parity Flag
Accept NMI 0*Maskable Interrupt
RETN Instruction Execution IFF2 * IFF2 → indicates completion of nonmaskable interrupt service routine.
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